MIT has devised a way of creating complex, self-assembling 3D nanostructures of wires and junctions. While self-assembling structures have been made from polymers before, this is the first time that multi-layer, configurable layouts have been created, opening up the path to self-assembled computer chips.
The science behind these self-assembling 3D structures is rather complex. Basically, MIT uses diblock copolymers, which are large molecules formed from two distinct polymers (each with different chemical and physical properties). These copolymers naturally form long cylinders — wires.
The key to MIT’s discovery is that the scientists have worked out how to exactly control the arrangement of these block copolymers. By growing tiny, 10nm-wide silica “posts” on a silicon substrate, the researchers can control the angles, bends, spacing, and junctions of the copolymer cylinders. Once the grid of posts has been built, the wafer is simply covered in the polymer material, and chip’s wires and junctions self-assemble. Watch MIT’s explainer video below for more information.
Now, before we get too excited, MIT hasn’t yet used this tech to build a computer chip — but within a year, the MIT team hopes to build a “simple electronic device.”
The real reason everyone is so excited, though, is that the silica posts can be built using equipment that is compatible with existing semiconductor fabs. Theoretically, chips built using this technique could have a much smaller feature size than the 28nm and 22nm chips produced by TSMC and Intel. While FinFETs or high-k metal gate transistors are complex, multi-layer devices that almost have to be built atom-by-atom, with dozens of chemical processes, MIT’s method only requires the erection of tiny little posts — a much simpler task. In theory, according to Caroline Ross of MIT, it should be possible to build posts that are much smaller than 10nm.
